Naresh Shenoy
Attends Indian Institute of Technology, Kharagpur
Department : Computer Science and Engineering
Major : Computer Science
Current/Ongoing Degree : Bachelor of Technology (Honors)
Expected Graduation date: July 2010
Research Interests and Current Projects
- Threat modeling in ad-hoc networks
- social network simulation
- VLSI circuit design
Work while at NDSSL:
- Pattern recognition and subgraph discovery in social network models; and
- Design of an educational game "Outbreak", based on the EPISIMS project which will be used by seventh and eighth graders to understand concepts in Algebra, chemistry and biology. His mentors are Prof. Madhav Marathe and Prof. Anil Vullikanti.
Publications:
- "An Efficient Greedy Approach to PLA Folding", By Mayur Bubna, Naresh Shenoy, Santanu Chattopadhyay, IEEE International Symposium on Circuits and Systems (ISCAS), 2008.
- "A Layout Aware Physical Design Method for QCA Circuits", By Mayur Bubna, Sudip Roy, Naresh Shenoy, Subhra Mazumdar, ACM Great Lakes Symposium on VLSI (GLSVLSI), 2008.